| | |
[General Information] |
| Total Memory Size: | 64 GBytes |
| Total Memory Size [MB]: | 65536 |
| | |
[Current Performance Settings] |
| Maximum Supported Memory Clock: | 1066.7 MHz |
| Current Memory Clock: | 1064.2 MHz |
| Current Timing (tCAS-tRCD-tRP-tRAS): | 15-15-15-35 |
| Memory Channels Supported: | 4 |
| Memory Channels Active: | 4 |
| | |
| Command Rate (CR): | 1T |
| Read to Read Delay (tRDRD_DG/TrdrdScDlr) Different Bank Group: | 1T |
| Read to Read Delay (tRDRD_DD) Different DIMM: | 1T |
| Write to Write Delay (tWRWR_DG/TwrwrScDlr) Different Bank Group: | 3T |
| Write to Write Delay (tWRWR_DD) Different DIMM: | 3T |
| Read to Write Delay (tRDWR_DD) Different DIMM: | 2T |
| Write to Read Delay (tWRRD_DG/TwrrdScDlr) Different Bank Group: | 1T |
| Write to Read Delay (tWRRD_DD) Different DIMM: | 2T |
| Read to Precharge Delay (tRTP): | 8T |
| Write to Precharge Delay (tWTP): | 27T |
| Write Recovery Time (tWR): | 16T |
| RAS# to RAS# Delay (tRRD_S): | 4T |
| Refresh Cycle Time (tRFC): | 374T |
| Four Activate Window (tFAW): | 23T |
| | |
[General Module Information] |
| Module Number: | 0 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | Registered DIMM (RDIMM) |
| Memory Speed: | 1200.0 MHz (DDR4-2400 / PC4-19200) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GR7MFR8N-UH |
| Module Revision: | 0.0 |
| Module Serial Number: | 3986493778 (52119DED) |
| Module Manufacturing Date: | Year: 2017, Week: 40 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | ECC |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Number Of Bank Groups: | 4 |
| Device Width: | 8 bits |
| Bus Width: | 72 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.83300 ns (1200 MHz) |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time – Different Bank Group (tRRD_Smin): | 3.300 ns |
| Minimum Active to Active Delay Time – Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time – Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Supported |
| Module Nominal Height: | 31 – 32 mm |
| Module Maximum Thickness (Front): | 1 – 2 mm |
| Module Maximum Thickness (Back): | 1 – 2 mm |
| Number of Registers: | 2 |
| Heat Spreader: | Not Present |
| Register Manufacturer: | IDT |
| Register Revision: | 3.0 |
| Address Mapping from Register to DRAM: | Standard |
| | |
[General Module Information] |
| Module Number: | 4 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | Registered DIMM (RDIMM) |
| Memory Speed: | 1200.0 MHz (DDR4-2400 / PC4-19200) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GR7MFR8N-UH |
| Module Revision: | 0.0 |
| Module Serial Number: | 4154265938 (52119DF7) |
| Module Manufacturing Date: | Year: 2017, Week: 40 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | ECC |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Number Of Bank Groups: | 4 |
| Device Width: | 8 bits |
| Bus Width: | 72 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.83300 ns (1200 MHz) |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time – Different Bank Group (tRRD_Smin): | 3.300 ns |
| Minimum Active to Active Delay Time – Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time – Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Supported |
| Module Nominal Height: | 31 – 32 mm |
| Module Maximum Thickness (Front): | 1 – 2 mm |
| Module Maximum Thickness (Back): | 1 – 2 mm |
| Number of Registers: | 2 |
| Heat Spreader: | Not Present |
| Register Manufacturer: | IDT |
| Register Revision: | 3.0 |
| Address Mapping from Register to DRAM: | Standard |
| | |
[General Module Information] |
| Module Number: | 8 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | Registered DIMM (RDIMM) |
| Memory Speed: | 1200.0 MHz (DDR4-2400 / PC4-19200) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GR7MFR8N-UH |
| Module Revision: | 0.0 |
| Module Serial Number: | 1654526290 (52119E62) |
| Module Manufacturing Date: | Year: 2017, Week: 40 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | ECC |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Number Of Bank Groups: | 4 |
| Device Width: | 8 bits |
| Bus Width: | 72 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.83300 ns (1200 MHz) |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time – Different Bank Group (tRRD_Smin): | 3.300 ns |
| Minimum Active to Active Delay Time – Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time – Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Supported |
| Module Nominal Height: | 31 – 32 mm |
| Module Maximum Thickness (Front): | 1 – 2 mm |
| Module Maximum Thickness (Back): | 1 – 2 mm |
| Number of Registers: | 2 |
| Heat Spreader: | Not Present |
| Register Manufacturer: | IDT |
| Register Revision: | 3.0 |
| Address Mapping from Register to DRAM: | Standard |
| | |
[General Module Information] |
| Module Number: | 12 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | Registered DIMM (RDIMM) |
| Memory Speed: | 1200.0 MHz (DDR4-2400 / PC4-19200) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GR7MFR8N-UH |
| Module Revision: | 0.0 |
| Module Serial Number: | 1453199698 (52119E56) |
| Module Manufacturing Date: | Year: 2017, Week: 40 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | ECC |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Number Of Bank Groups: | 4 |
| Device Width: | 8 bits |
| Bus Width: | 72 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.83300 ns (1200 MHz) |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time – Different Bank Group (tRRD_Smin): | 3.300 ns |
| Minimum Active to Active Delay Time – Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time – Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Supported |
| Module Nominal Height: | 31 – 32 mm |
| Module Maximum Thickness (Front): | 1 – 2 mm |
| Module Maximum Thickness (Back): | 1 – 2 mm |
| Number of Registers: | 2 |
| Heat Spreader: | Not Present |
| Register Manufacturer: | IDT |
| Register Revision: | 3.0 |
| Address Mapping from Register to DRAM: | Standard |
| | |
[General Module Information] |
| Module Number: | 32 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | Registered DIMM (RDIMM) |
| Memory Speed: | 1200.0 MHz (DDR4-2400 / PC4-19200) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GR7MFR8N-UH |
| Module Revision: | 0.0 |
| Module Serial Number: | 1688080722 (52119E64) |
| Module Manufacturing Date: | Year: 2017, Week: 40 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | ECC |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Number Of Bank Groups: | 4 |
| Device Width: | 8 bits |
| Bus Width: | 72 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.83300 ns (1200 MHz) |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time – Different Bank Group (tRRD_Smin): | 3.300 ns |
| Minimum Active to Active Delay Time – Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time – Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Supported |
| Module Nominal Height: | 31 – 32 mm |
| Module Maximum Thickness (Front): | 1 – 2 mm |
| Module Maximum Thickness (Back): | 1 – 2 mm |
| Number of Registers: | 2 |
| Heat Spreader: | Not Present |
| Register Manufacturer: | IDT |
| Register Revision: | 3.0 |
| Address Mapping from Register to DRAM: | Standard |
| | |
[General Module Information] |
| Module Number: | 36 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | Registered DIMM (RDIMM) |
| Memory Speed: | 1200.0 MHz (DDR4-2400 / PC4-19200) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GR7MFR8N-UH |
| Module Revision: | 0.0 |
| Module Serial Number: | 1100878162 (52119E41) |
| Module Manufacturing Date: | Year: 2017, Week: 40 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | ECC |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Number Of Bank Groups: | 4 |
| Device Width: | 8 bits |
| Bus Width: | 72 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.83300 ns (1200 MHz) |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time – Different Bank Group (tRRD_Smin): | 3.300 ns |
| Minimum Active to Active Delay Time – Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time – Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Supported |
| Module Nominal Height: | 31 – 32 mm |
| Module Maximum Thickness (Front): | 1 – 2 mm |
| Module Maximum Thickness (Back): | 1 – 2 mm |
| Number of Registers: | 2 |
| Heat Spreader: | Not Present |
| Register Manufacturer: | IDT |
| Register Revision: | 3.0 |
| Address Mapping from Register to DRAM: | Standard |
| | |
[General Module Information] |
| Module Number: | 40 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | Registered DIMM (RDIMM) |
| Memory Speed: | 1200.0 MHz (DDR4-2400 / PC4-19200) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GR7MFR8N-UH |
| Module Revision: | 0.0 |
| Module Serial Number: | 1570640210 (52119E5D) |
| Module Manufacturing Date: | Year: 2017, Week: 40 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | ECC |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Number Of Bank Groups: | 4 |
| Device Width: | 8 bits |
| Bus Width: | 72 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.83300 ns (1200 MHz) |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time – Different Bank Group (tRRD_Smin): | 3.300 ns |
| Minimum Active to Active Delay Time – Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time – Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Supported |
| Module Nominal Height: | 31 – 32 mm |
| Module Maximum Thickness (Front): | 1 – 2 mm |
| Module Maximum Thickness (Back): | 1 – 2 mm |
| Number of Registers: | 2 |
| Heat Spreader: | Not Present |
| Register Manufacturer: | IDT |
| Register Revision: | 3.0 |
| Address Mapping from Register to DRAM: | Standard |
| | |
[General Module Information] |
| Module Number: | 44 |
| Module Size: | 8 GBytes |
| Memory Type: | DDR4 SDRAM |
| Module Type: | Registered DIMM (RDIMM) |
| Memory Speed: | 1200.0 MHz (DDR4-2400 / PC4-19200) |
| Module Manufacturer: | SK Hynix |
| Module Part Number: | HMA81GR7MFR8N-UH |
| Module Revision: | 0.0 |
| Module Serial Number: | 211685714 (52119E0C) |
| Module Manufacturing Date: | Year: 2017, Week: 40 |
| Module Manufacturing Location: | 1 |
| SDRAM Manufacturer: | SK Hynix |
| Error Check/Correction: | ECC |
| | |
[Module Characteristics] |
| Row Address Bits: | 16 |
| Column Address Bits: | 10 |
| Module Density: | 8192 Mb |
| Number Of Ranks: | 1 |
| Number Of Bank Groups: | 4 |
| Device Width: | 8 bits |
| Bus Width: | 72 bits |
| Die Count: | 1 |
| Module Nominal Voltage (VDD): | 1.2 V |
| Minimum SDRAM Cycle Time (tCKAVGmin): | 0.83300 ns (1200 MHz) |
| Maximum SDRAM Cycle Time (tCKAVGmax): | 1.60000 ns |
| CAS# Latencies Supported: | 10, 11, 12, 13, 14, 15, 16, 17, 18 |
| Minimum CAS# Latency Time (tAAmin): | 13.750 ns |
| Minimum RAS# to CAS# Delay (tRCDmin): | 13.750 ns |
| Minimum Row Precharge Time (tRPmin): | 13.750 ns |
| Minimum Active to Precharge Time (tRASmin): | 32.000 ns |
| | |
| Supported Module Timing at 1200.0 MHz: | 17-17-17-39 |
| Supported Module Timing at 1066.7 MHz: | 15-15-15-35 |
| Supported Module Timing at 933.3 MHz: | 13-13-13-30 |
| Supported Module Timing at 800.0 MHz: | 11-11-11-26 |
| Supported Module Timing at 666.7 MHz: | 10-10-10-22 |
| | |
| Minimum Active to Active/Refresh Time (tRCmin): | 45.750 ns |
| Minimum Refresh Recovery Time Delay (tRFC1min): | 350.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC2min): | 260.000 ns |
| Minimum Refresh Recovery Time Delay (tRFC4min): | 160.000 ns |
| Minimum Four Activate Window Delay Time (tFAWmin): | 21.000 ns |
| Minimum Active to Active Delay Time – Different Bank Group (tRRD_Smin): | 3.300 ns |
| Minimum Active to Active Delay Time – Same Bank Group (tRRD_Lmin): | 4.900 ns |
| Minimum CAS to CAS Delay Time – Same Bank Group (tCCD_Lmin): | 5.000 ns |
| | |
[Features] |
| Module Temperature Sensor (TSOD): | Supported |
| Module Nominal Height: | 31 – 32 mm |
| Module Maximum Thickness (Front): | 1 – 2 mm |
| Module Maximum Thickness (Back): | 1 – 2 mm |
| Number of Registers: | 2 |
| Heat Spreader: | Not Present |
| Register Manufacturer: | IDT |
| Register Revision: | 3.0 |
| Address Mapping from Register to DRAM: | Standard |